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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator General Description
The AAT3244 is a dual, low input voltage, low dropout (LDO) linear regulator with two Power OK (POK) outputs. Two integrated regulators provide high power outputs of 300mA from an input voltage range of 1.8V to 5.5V. Two POK pins provide open drain signals when their respective regulator is within regulation. The AAT3244 has independent voltage inputs and enable pins for increased design flexibility. The device features a very low quiescent current (typically 85A) and low dropout voltages (200mV at full load), making it ideal for portable applications where battery life is critical. The AAT3244 is available in a space-saving, Pb-free 12-pin TSOPJW package and is capable of operation over the -40C to +85C temperature range.
Features
* * * * * * * * * *
PowerLinearTM
Low Input Voltage -- 1.8V to 5.5V Ultra-Low Adjustable Output Voltage -- 3.6V to 0.6V High Output Current -- 300mA per LDO Low Dropout Voltage -- Typ 200mV @ 300mA Low 85A Quiescent Current (Both LDOs On) High Output Accuracy: 1.5% Independent Input Supply and Enable Pins Over-Temperature Protection 12-Pin TSOPJW Package -40C to +85C Temperature Range
Applications
* * * * * Cellular Phones Digital Cameras Handheld Instruments Microprocessor/DSP Core/IO Power PDAs and Handheld Computers
Typical Application
VIN = 3.6V VCC INA Enable A OUTA 100k ENA FBA POKA INB CIN 1F POKB Enable B ENB GND GND FBB 59k OUTB 100k 267k VOUTB = 3.3V 2.2F POKA 59k 118k V OUTA = 1.8V
POKB 2.2F
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Pin Descriptions
Pin #
1 2 3 4 5 6 7 8 9 10 11 12
Symbol
OUTA INA FBA FBB INB OUTB POKB ENB VCC GND ENA POKA
Function
300mA regulator output pin; should be closely decoupled with a low equivalent series resistance (ESR) ceramic capacitor. Input voltage pin for LDOA; should be closely decoupled. Feedback input pin for LDOA. This pin is connected to OUTA. It is used to see the output of LDOA to regulate to the desired value via an external resistor divider. Feedback input pin for LDOB. This pin is connected to OUTB. It is used to see the output of LDOB to regulate to the desired value via an external resistor divider. Input voltage pin for LDOB; should be closely decoupled. 300mA regulator output pin; should be closely decoupled with a low ESR ceramic capacitor. Power OK pin with open drain output. It is pulled low when the OUTB pin is outside the regulation window of 10%. Place a pull-up resistor between POKB and OUTB. Enable pin for LDOB. Active high. VEN must be less than or equal to VCC. Input bias supply. Connect to an "always ON" supply voltage between 2.7V and 5.5V. Ground connection pin. Enable pin for LDOA. Active high. VEN must be less than or equal to VCC. Power OK pin with open drain output. It is pulled low when the OUTA pin is outside the regulation window of 10%. Place a pull-up resistor between POKA and OUTA.
Pin Configuration
TSOPJW-12 (Top View)
OUTA INA FBA FBB INB OUTB
1 2 3 4 5 6
12 11 10 9 8 7
POKA ENA GND VCC ENB POKB
2
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Absolute Maximum Ratings1
Symbol
VCC, VIN VFB VEN TJ TLEAD
Description
Input Voltage, LDO Input Voltage to GND FB to GND EN to GND Operating Junction Temperature Range Maximum Soldering Temperature (at leads, 10 sec)
Value
6.0 -0.3 to VIN + 0.3 -0.3 to 6.0 -40 to 150 300
Units
V V V C C
Thermal Information
Symbol
PD JA
Description
Maximum Power Dissipation (TA = 25C) Thermal Resistance2
Value
625 160
Units
mW C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Mounted on an FR4 board. 3244.2007.08.1.1
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Electrical Characteristics1
VCC = VINA = VINB = 3.6V; TA = -40C to +85C, unless otherwise noted. Typical values are TA = 25C. Symbol
Bias Power VCC IQ ISHDN UVLO
Description
Supply Bias Power Supply Input Quiescent Current Shutdown Current Under-Voltage Lockout Voltage
Conditions
Min
2.7
Typ
Max
5.5 160 1.0 2.6
Units
V A A V mV V % V mV %/V V V s % of VOUT % of VOUT V A mA A C C
VENA = VENB = VIN; ILOAD = 0 VENA = VENB = GND VCC Rising Hysteresis 1.8 -2.0 -3.5 0.594
85
200 5.5 2.0 3.5 0.606 300 0.09 0.6 VCC 100 98 1.0 0.4 1.0 300 1.0 140 15
LDOA, LDOB; IOUT = 300mA VIN Input Voltage VOUT VFB VDO VOUT/ VOUT /VIN VEN(L) VEN(H) tEN VPOK VPOKHYS VPOK(LO) IPOK IOUT ISD TSD THYS Output Voltage Tolerance Feedback Voltage Dropout Voltage2 Line Regulation3 Enable Threshold Low Enable Threshold High Turn-On Enable Time Power OK Trip Threshold Power OK Hysteresis Power OK Output Voltage Low POK Output Leakage Current Output Current Shutdown Current Over-Temperature Shutdown Threshold Over-Temperature Shutdown Hysteresis IOUT = 1mA to 300mA IOUT = 300mA VIN = VOUT + 1.0V to 5.0V TA = 25C TA = -40C to +85C
0.6 200
1.5 VOUT Rising, TA = 25C ISINK = 1mA VPOK < 5.5V, VOUT in Regulation VIN(MIN) = 2.5V VIN = 5V 80
1. The AAT3244 is guaranteed to meet performance specifications over the -40C to +85C operating temperature range and is assured by design, characterization, and correlation with statistical process controls. 2. VDO is defined as VIN - VOUT when VOUT is 98% of nominal. 3. CIN = 10F. 4. To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN 1.8V.
4
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Typical Characteristics
Dropout Voltage vs. Temperature
(VOUT = 2.5V; IOUT = 300mA)
220
Output Voltage vs. Input Voltage
(VOUT = 2.5V)
2.60
Dropout Voltage (mV)
Output Voltage (V)
200 180 160 140 120 100 80 60 -40 -15 10 35 60 85
2.55 2.50 2.45 2.40 2.35 2.30 2.25
100mA
50mA 300mA 250mA 200mA
150mA
2.20 2.5
2.6
2.7
2.8
2.9
3.0
Temperature (C)
Input Voltage (V)
Dropout Voltage vs. Output Current
(VOUT = 2.5V)
180 120
Quiescent Current vs. Input Voltage
(VOUT = 2.5V)
Quiescent Current (A)
Dropout Voltage (mV)
160 140 120 100 80 60 40 20 0 0 50 100 150 200 250 300
110 100 90 80 70 60 50 40 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
85C 25C
85C
25C
-40C
-40C
Output Current (mA)
Input Voltage (V)
Quiescent Current vs. Temperature
(VOUT = 2.5V)
88
Output Voltage vs. Temperature
(VIN = 3.6V; VOUT = 2.5V)
2.60 2.58
Quiescent Current (A)
86 84 82 80 78 76 74 72 -40 -15
VIN = 3.0V VIN = 3.6V VIN = 4.2V
Output Voltage (V)
2.56 2.54 2.52 2.50 2.48 2.46 2.44 2.42 -40
100mA 200mA 50mA 300mA
10
35
60
85
-15
10
35
60
85
Temperature (C)
Temperature (C)
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Typical Characteristics
Turn-On Time
(VOUT = 1.8V)
6 4 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.00
Load Regulation
(VOUT = 2.5)
Output Voltage (bottom) (V)
Output Voltage Error (%)
1.50 1.00 0.50 0.00 -0.50 -1.00 -1.50 -2.00 0 1 10
Enable (top) (V)
2 0
VIN = 2.7V
VIN = 3.0V
VIN = 3.6V VIN = 4.2V
100 1000
Time (50s/div)
Output Current (mA)
(200mA-300mA; VOUT = 1.8V)
0.4
0.3
Load Transient
(1mA-200mA; VOUT = 1.8V)
Output Voltage (AC coupled) (bottom) (mV)
Load Transient
Output Voltage (AC coupled) (bottom) (mV)
Output Current (top) (A)
Output Current (top) (A)
0.3 0.2 0.1 0.0 50 25 0 -25 -50
0.2 0.1 0.0 150 100 50 0 -50 -100
Time (50s/div)
Time (50s/div)
(3.6V- 4.2V; VOUT = 1.8V)
4.5 3.5 3.0 2.5
Line Transient
Over-Current Protection
Output Voltage (AC coupled) (bottom) (mV)
Input Voltage (top) (V)
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 100 50 0 -50 -100
Current (A)
2.0 1.5 1.0 0.5 0.0
Time (50s/div)
Time (50ms/div)
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3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Typical Characteristics
POK Output Response
Enable Threshold Voltage vs. Input Voltage
1.4
Enable Voltage (V)
VIN (2V/div) VOUT (1V/div)
1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
VIH
VPOK (2V/div)
VIL
Time (200s/div)
Input Voltage (V)
Ground Current vs. Input Voltage
130
Ground Current (A)
120 110 100 90 80 70 60 2.5 3 3.5 4 4.5 5 5.5
IOUT = 300mA IOUT = 100mA IOUT = 50mA IOUT = 10mA
Input Voltage (V)
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Functional Block Diagram
INA OUTA
ENA FBA POKA
94%
VCC
LDO Bias
Voltage Reference
Over-Temperature Protection
POKB
FBB ENB
INB
OUTB
GND
Functional Description
The AAT3244 is a high performance, low input voltage, dual LDO linear regulator. Both LDOA and LDOB are capable of delivering 300mA of current, within power dissipation limits. The LDOs are designed to operate with low-cost ceramic capacitors. For added flexibility, both regulators have independent input voltages operating from 1.8V to 5.5V, but share a common bias voltage, VCC. The VCC voltage should be tied to the highest system voltage available and should be available at all times. Each regulator has an independent enable
pin. An external feedback pin for each LDO allows programming the output voltage from 3.6V to 0.6V. The regulators have thermal protection in case of adverse operating conditions. A power OK comparator for each output is also integrated, which indicates when the output is within regulation. The POK is an open drain output and is held low when the AAT3244 is in shutdown mode. Refer to the Thermal Considerations section of this datasheet for details on device operation at maximum output current loads.
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Applications Information
To assure the maximum possible performance is obtained from the AAT3244, please refer to the following application recommendations. cations where output load is less than 10mA, the minimum value for COUT can be as low as 0.47F.
Capacitor Characteristics
Ceramic composition capacitors are highly recommended over all other types of capacitors for use with the AAT3244. Ceramic capacitors offer many advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically has very low ESR, is lower cost, has a smaller PCB footprint, and is non-polarized. Line and load transient response of the LDO regulator is improved by using low ESR ceramic capacitors. Since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage.
Input Capacitor
A 1F or larger capacitor is typically recommended for CIN in most applications. A CIN capacitor is not required for basic LDO regulator operation; however, if the AAT3244 is physically located more than three centimeters from an input power source, a CIN capacitor will be needed for stable operation. CIN should be located as closely to the device supply pin as practically possible. CIN values greater than 1F will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for CIN; however, for 300mA LDO regulator output operation, ceramic capacitors are recommended for CIN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources, such as batteries in portable devices.
Equivalent Series Resistance
ESR is a very important characteristic to consider when selecting a capacitor. ESR is the internal series resistance associated with a capacitor that includes lead resistance, internal connections, size and area, material composition, and ambient temperature. Typically, capacitor ESR is measured in milliohms for ceramic capacitors and can range to more than several ohms for tantalum or aluminum electrolytic capacitors.
Output Capacitor
For proper load voltage regulation and operational stability, a capacitor is required between pins OUT and GND. The COUT capacitor connection to the LDO regulator ground pin should be made as direct as practically possible for maximum device performance. The AAT3244 has been specifically designed to function with very low ESR ceramic capacitors. For best performance, ceramic capacitors are recommended. Typical output capacitor values for maximum output current conditions range from 1F to 10F. Applications requiring low output noise and optimum power supply ripple rejection should use 2.2F or greater for COUT. If desired, COUT may be increased without limit. In low output current appli-
Ceramic Capacitor Materials
Ceramic capacitors less than 0.1F are typically made from NPO or C0G materials. NPO and C0G materials generally have tight tolerance and are very stable over temperature. Larger capacitor values are usually composed of X7R, X5R, Z5U, or Y5V dielectric materials. These two material types are not recommended for use with LDO regulators since the capacitor tolerance can vary more than 50% over the operating temperature range of the device. A 2.2F Y5V capacitor could be reduced to 1F over temperature; this could cause problems for circuit operation. X7R and X5R dielectrics are much more desirable. The temperature tolerance of X7R dielectric is better than 15%. Capacitor area is another contributor to ESR. Capacitors
3244.200708.0.66 (ADVANCED INFORMATION)
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
which are physically large in size will have a lower ESR when compared to a smaller sized capacitor of an equivalent material and capacitance value. These larger devices can improve circuit transient response when compared to an equal value capacitor in a smaller package size. Consult capacitor vendor datasheets carefully when selecting capacitors for LDO regulators.
No-Load Stability
The AAT3244 is designed to maintain output voltage regulation and stability under operational noload conditions. This is an important characteristic for applications where the output current may drop to zero.
POK Output
The AAT3244 features integrated Power OK comparators which can be used as an error flag. The POK open drain output goes low when output voltage is 6% (typical) below its nominal regulation voltage. Additionally, any time one of the regulators is in shutdown, the respective POK output is pulled low. Connect a 100k pull up resistor from POKA to either INA or OUTA, and POKB to either INB or OUTB.
Reverse Output-to-Input Voltage Conditions and Protection
Under normal operating conditions, a parasitic diode exists between the output and input of the LDO regulator. The input voltage should always remain greater than the output load voltage, maintaining a reverse bias on the internal parasitic diode. Conditions where VOUT might exceed VIN should be avoided since this would forward bias the internal parasitic diode and allow excessive current flow into the OUTA/B pins, possibly damaging the LDO regulator. In applications where there is a possibility of VOUT exceeding VIN for brief amounts of time during normal operation, the use of a larger value CIN capacitor is highly recommended. A larger value of CIN with respect to COUT will result in a slower CIN decay rate during shutdown, thus preventing VOUT from exceeding VIN. In applications where there is a greater danger of VOUT exceeding VIN for extended periods of time, it is recommended to place a Schottky diode across INA/B to OUTA/B (connecting the cathode to INA/B and anode to OUTA/B). The Schottky diode forward voltage should be less than 0.45V.
Enable Function
The AAT3244 features an LDO regulator enable/ disable function. Each LDO has its own dedicated enable pin. These pins (ENA, ENB) are active high and are compatible with CMOS logic. To assure the LDO regulators will switch on,
1.5V VEN VCC
In shutdown, the AAT3244 will consume less than 1.0A of current. If the enable function is not needed in a specific application, it may be tied to VCC to keep the LDO regulator in a continuously on state.
Low Voltage Input Bias Considerations
The input voltage of both LDOs is designed to operate down to 1.8V input. However, to operate the LDO to its full potential, the AAT3244 requires a minimum bias voltage (VCC) of 2.7V for all LDO input voltages between 1.8V and 2.7V. In portable systems utilizing single-cell Lithium-ion batteries, the VCC pin may be connected directly to the battery. In non-portable applications, the voltage can be connected to any supply from 2.7V to 5.5V. In the event that one of the input supplies is above 2.7V, this can also be connected to VCC, assuming that the supply will always be available.
Thermal Protection
The AAT3244 has an internal thermal protection circuit which will activate when the device die temperature exceeds 140C. The LDO regulator output will remain in a shutdown state until the internal die temperature falls back approximately 15C below the trip point.
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3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
VCC R6 100K POKA R5 100K
12
9
TSOPJW-12
OUTA
1
POKA
VCC
(Optional) OUTA R1 Adj. C6 22pF C4
POKB
7
POKB
2
FBA
3
INA
C1 1uF ENA
11
INA
2.2uF R2 59K
ENA ON/OFF
AAT3244
OUTB
6
(Optional) OUTB R3 Adj. C7 22pF C5 2.2uF R4 59K
INB C2 1uF
5
INB FBB
8 4
ENB ON/OFF
ENB
GND
10
Figure 1: AAT3244 Schematic.
Adjustable Output Resistor Selection
Resistors R1, R2 and R3, R4 of Figure 1 program the outputs to regulate at a voltage higher than 0.6V. To limit the bias current required for the external feedback resistor string while maintaining good noise immunity, the suggested value for R2 and R4 is 59k. Decreased resistor values are necessary to maintain noise immunity on the FB pin, resulting in increased quiescent current. Table 1 summarizes the resistor values for various output voltages.
VOUT R1 = V - 1 * R2 REF
VOUT (V)
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.8 1.85 2.0 2.5 3.3 3.6
R2 = 59k R1 (k)
19.6 29.4 39.2 49.9 59.0 68.1 78.7 88.7 118 124 137 187 267 295
R2 = 221k R1 (k)
75 113 150 187 221 261 301 332 442 464 523 715 1000 1105
With enhanced transient response for extreme pulsed load application, an external feed-forward capacitor, (C6 and C7 in Figure 1), can be added.
Table 1. Adjustable Resistor Values For LDO Regulator.
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Thermal Considerations and High Output Current Applications
The AAT3244 is designed to deliver continuous output load currents of 300mA under normal operating conditions and can supply up to 600mA during circuit start-up conditions. This is desirable for applications where there might be a brief high inrush current during a power-on event. The limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. In order to obtain high operating currents, careful device layout and circuit operating conditions need to be taken into account. The following discussions will assume the LDO regulator is mounted on a printed circuit board utilizing the minimum recommended footprint as stated in the layout considerations section of this document. At any given ambient temperature (TA), the maximum package power dissipation can be determined by the following equation: The following is an example for a 2.5V output: VOUTA = 2.5V VOUTB = 1.5V IOUTB = 150mA VIN = 4.2V IGND = 125A
IOUTA(MAX) = 625mW - (2 * 4.2V * 125A) - (4.2 - 1.5) * 150mA 4.2 - 2.5
IOUTA(MAX) = 129mA From the discussion above, PD(MAX) was determined to equal 625mW at TA = 25C. Therefore, with Regulator B delivering 150mA at 1.5V, Regulator A can sustain a constant 2.5V output at a 129mA load current at an ambient temperature of 25C. Higher input-to-output voltage differentials can be obtained with the AAT3244, while maintaining device functions within the thermal safe operating area. To accomplish this, the device thermal resistance must be reduced by increasing the heat sink area or by operating the LDO regulator in a duty-cycled mode. For example, an application requires VIN = 4.2V while VOUTA = 1.5V at a 300mA load, VOUTB = 1.5V at a 200mA load, and TA = 25C. To maintain this high input voltage and output current level, the LDO regulator must be operated in a duty-cycled mode. Refer to the following calculation for duty-cycle operation: IGND = 125A IOUTA = 300mA IOUTB = 200mA VIN = 4.2V VOUT = 1.5V PD(MAX) is assumed to be 625mW
%DC = %DC = 100(PD(MAX)) [(VIN - VOUTA)IOUTA + (VIN * IGND)] + [(VIN - VOUTB)IOUTB + (VIN * IGND)] 100 * 625mW [(4.2V - 1.5V)300mA + (4.2V * 125A)] + [(4.2V - 1.5V)200mA + (4.2V * 125A)]
PD(MAX) =
TJ(MAX) - TA JA
Constants for the AAT3244 are TJ(MAX) (the maximum junction temperature for the device, which is 125C) and JA = 160C/W (the package thermal resistance). Typically, maximum conditions are calculated at the maximum operating temperature of TA = 85C and under normal ambient conditions where TA = 25C. Given TA = 85C, the maximum package power dissipation is 250mW. At TA = 25C, the maximum package power dissipation is 625mW. The maximum continuous output current for the AAT3244 is a function of the package power dissipation and the input-to-output voltage drop across the LDO regulator. To determine the maximum output current for a given output voltage, refer to the following equation. This calculation accounts for the total power dissipation of the LDO regulator, including that caused by ground current.
PD(MAX) = [(VIN - VOUTA)IOUTA + (VIN * IGND)] + [(VIN - VOUTB)IOUTB + (VIN * IGND)]
This formula can be solved for IOUTA to determine the maximum output current for LDOA:
IOUTA(MAX) = PD(MAX) - (2 * VIN * IGND) - (VIN - VOUTB) * IOUTB VIN - VOUTA
%DC = 46.3%
12
(ADVANCED INFORMATION) 3244.200708.0.66
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
For a 300mA output current and a 2.7V drop across the AAT3244 at an ambient temperature of 25C, the maximum on-time duty cycle for the device would be 46.3%. 4. The resistance of the trace from the load returns to GND (Pin 10) should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal signal ground and the power ground. 5. The feedback node is connected directly to the non-inverting input of the error amplifier, thus any noise or ripple from the divider resistors will be subsequently amplified by the gain of the error amplifier. This effect can increase noise seen on the LDO regulator output, as well as reduce the maximum possible power supply ripple rejection. For low output noise and highest possible power supply ripple rejection performance, it is critical to connect the divider resistors (R2 and R4) and output capacitors (C4 and C5) directly to the LDO regulator ground pin. This method will eliminate any load noise or ripple current feedback through the LDO regulator.
Under-Voltage Lockout
Under-voltage lockout (UVLO) guarantees sufficient VCC bias and proper operation of all internal circuits prior to activation.
Printed Circuit Board Layout Recommendations
The suggested PCB layout for the AAT3244 in a TSOPJW-12 package is shown in Figures 2 and 3. The following guidelines should be used to help ensure a proper layout. 1. The input capacitors (C1and C2) should connect as closely as possible to input pins (Pin 2 and Pin 5) and GND (Pin 10). 2. The output traces of the feedback resistors (R1 and R3) should be separate from any power trace and connect as closely as possible to the load point. Sensing along a high-current load trace will degrade DC load regulation. Feedback resistors should be placed as closely as possible to the FB pin (Pin 3 and Pin 4) to minimize the length of the high impedance feedback trace.
Evaluation Board Layout
The AAT3244 evaluation layout follows the recommend printed circuit board layout procedures and can be used as an example for good application layouts (See Figures 2 and 3). Note: Board layout shown is not to scale.
Figure 2: AAT3244 Evaluation Board Top Side Layout.
Figure 3: AAT3244 Evaluation Board Bottom Side Layout.
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AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Ordering Information
Voltage Package
TSOPJW-12
LDO A LDO B
Marking1
WTXYY
Part Number (Tape and Reel)2
AAT3244ITP-AA-T1
0.6V
0.6V
All AnalogicTech products are offered in Pb-free packaging. The term "Pb-free" means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/pbfree.
Legend
Voltage Adjustable (0.6V) Code A
1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD.
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3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator Package Information
TSOPJW-12
0.20 + 0.10 - 0.05
2.40 0.10
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
2.85 0.20
7 NOM 3.00 0.10
0.9625 0.0375 + 0.10 1.00 - 0.065
0.04 REF
0.055 0.045
4 4
0.010
0.15 0.05
0.45 0.15 2.75 0.25
All dimensions in millimeters.
(c) Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech's terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611
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